TSMC is the world's largest semiconductor foundry, manufacturing the chips designed by Nvidia, Apple, AMD and most other major chip companies. Its stock trades as
TSM in the United States and 2330 in Taiwan. Four levers drive it: foundry revenue growth, AI demand, capital spending and margins — which reached 66.2% gross in early 2026.
Pure-play foundry. TSMC designs nothing and sells no branded products — it manufactures wafers for fabless designers, which is why its results read as a health check on the whole chip industry.
AI has reshaped the mix. High-performance computing was 58% of 2025 revenue; smartphones 29%. A decade earlier phones dominated.
Early 2026 snapshot: quarterly net revenue $35.9 billion, gross margin 66.2% (up 3.9 points), operating margin 58.1%, monthly revenue growing above 35% year over year.
Capex is a demand signal. 2026 spending guided toward the high end of a $52–56 billion plan. Investors read a raised budget as management seeing stronger orders ahead.
Two bottlenecks give pricing power: leading-edge nodes, and CoWoS advanced packaging, which became an industry-wide constraint during the AI buildout.
| Item | Detail |
| US ticker | TSM (American Depositary Receipt, NYSE) |
| Home listing | 2330, Taiwan Stock Exchange |
| Business model | Pure-play foundry — manufactures, does not design |
| 2025 revenue mix | High-performance computing 58%, smartphones 29% |
| Early 2026 quarterly revenue | $35.9 billion |
| Gross margin | 66.2%, up 3.9 points |
| Operating margin | 58.10% |
| 2026 capex plan | $52–56 billion, guided toward the high end |
| Next nodes | N2, followed by A16 |
| Unusual disclosure | Publishes revenue monthly, unlike most large companies |
Taiwan Semiconductor Manufacturing Company is a pure-play foundry. It does not design chips or sell products under its own brand. It manufactures wafers for fabless designers, earning revenue from production volume, advanced technology pricing, and long-term customer relationships.
That customer list spans nearly every major chip company. Nvidia and AMD build their AI accelerators at TSMC — the demand behind that is covered in MEXC's published
Nvidia stock guide. Apple makes its iPhone and Mac processors there. Broadcom, Qualcomm, MediaTek, and the custom chip teams at large cloud providers use the same factories. This breadth is why TSMC's results are read as a health check on the whole chip industry rather than on any single product cycle.
US investors typically buy the ADR listed as TSM in New York, while the primary listing trades as 2330 in Taiwan. Both represent the same underlying business, though the ADR trades in US dollars during US market hours.
AI transformed TSMC's revenue mix in just a few years. High-performance computing, the segment that includes AI accelerators and data center processors, accounted for 58% of TSMC's 2025 revenue, while smartphones contributed 29%. A decade earlier, phones were the dominant driver.
AI demand pulls on TSMC from two directions at once. First, accelerators require the most advanced process nodes, where TSMC holds the strongest position and charges the highest wafer prices. Second, AI chips must be packaged with high-bandwidth memory using TSMC's CoWoS technology, a capability that became an industry bottleneck during the AI buildout and gave TSMC a second layer of pricing power. The memory side of that pairing is covered in MEXC's published
HBM guide.
The result showed up clearly in the growth numbers. In mid-2026, TSMC's monthly revenue was growing at better than 35% year over year, and
Reuters reported expectations for an extended run of consecutive record quarterly profits on AI demand. The spending that funds it comes from the cloud companies described in MEXC's published
AI CapEx guide.
TSMC sells manufacturing capacity, and the economics reward being first to each new technology node. Leading-edge wafers command premium prices because only TSMC can produce them at scale and yield. Older nodes stay in production for years serving cars, appliances, and industrial chips, generating steady revenue on equipment already depreciated.
Utilization ties the model together. Foundry costs are largely fixed, so full factories make each extra wafer highly profitable, while soft demand squeezes margins quickly. This is why TSMC's profits swing with the semiconductor cycle even though its competitive position barely moves.
A snapshot from early 2026 illustrates the model working at full strength.
| Metric | Early 2026 snapshot |
| Quarterly net revenue | $35.9 billion |
| Gross margin | 66.2%, up 3.9 points on higher utilization and node pricing |
| Operating margin | 58.10% |
| Monthly revenue growth | Above 35% year over year |
Margins in the mid-60s are exceptional for any manufacturer. They reflect a rare combination of full factories, a rich AI-driven product mix, and pricing power at nodes where customers have no real alternative.
TSMC guided its 2026 capital spending toward the high end of a $52 to $56 billion plan, among the largest capex budgets of any company in the world. That number is best understood as the price of capturing AI demand. New leading-edge fabs take years to build, so spending decisions made now determine whether capacity exists when the next wave of accelerator orders arrives.
Capex cuts both ways for shareholders. Heavy spending drives depreciation, which pressures margins after new fabs open, and it reduces near-term free cash flow. But underspending carries a worse risk: turning away AI orders and pushing customers to look for a second supplier. Investors therefore read capex revisions as a demand signal. A raised budget usually means management sees stronger orders ahead, while a cut suggests caution.
Technology roadmap spending matters too. TSMC's N2 node and the A16 process that follows, built on new transistor structures suited to AI computing, decide whether the company keeps its lead through the next cycle.
Five forces move TSMC's margins, and earnings calls tend to revolve around them.
| Driver | Effect on margin |
| Utilization | The largest factor — full fabs lift gross margin sharply, as the early 2026 jump showed |
| Product mix | AI and leading-edge wafers earn more than mature nodes |
| Node ramps | Work the other way at first — a new process starts with lower yields and heavy depreciation |
| Currency | Billing in US dollars while paying costs in New Taiwan dollars shifts reported margins with no change in the business |
| Overseas fabs | Arizona, Japan and Germany diversify geopolitical risk but cost more to build and run than fabs in Taiwan |
The overseas-fab tradeoff is the one management is asked to quantify most often, because it trades a measurable margin cost against an unmeasurable reduction in concentration risk.
TSMC publishes monthly revenue figures, something few large companies do, making it one of the most closely tracked demand indicators in technology. Each release and each earnings call is read against a consistent set of questions.
| Signal | What investors ask |
| Monthly sales growth | Is the year-over-year pace holding near the AI-cycle trend or fading? |
| AI and HPC commentary | Is demand broadening across customers or concentrated in a few? |
| Gross margin guidance | Can mid-60s margins survive rising depreciation? |
| Capex revisions | Is spending moving above or below the annual plan? |
| CoWoS packaging capacity | Is advanced packaging still the shipment bottleneck? |
| N2 and A16 progress | Are new nodes ramping on schedule with healthy yields? |
Strong monthly numbers tend to lift the whole AI supply chain, from Nvidia and AMD down to equipment makers, while a miss raises questions far beyond TSMC itself. Single data points can still mislead, a discipline covered further in this guide to
why stock prices can fall even when earnings beat expectations.
The largest risk is geographic. Most of TSMC's leading-edge capacity sits in Taiwan, so investors always build some regional and export-control risk into the stock's price, whatever the fundamentals show. Overseas fabs reduce this concentration slowly and at higher cost.
Cyclicality comes next. Semiconductors have always moved in cycles, and an AI spending slowdown would hit utilization, margins, and the returns on tens of billions in new capacity at the same time. Customer concentration sharpens that exposure, since a handful of AI and smartphone customers drives a large share of demand. Margins carry a quieter version of the same risk: mid-60s gross margins reflect peak conditions, and rising depreciation from new fabs may pull them back toward normal levels over time.
Execution and valuation round out the list. Delays or yield problems at N2 or A16 could narrow TSMC's technology lead, and a stock priced for continued AI strength leaves little room for disappointment — worth testing with this guide to
combining PE, PB, PS, and PEG valuation indicators. TSMC sits below the mega-caps that fund the cycle, profiled in MEXC's published
Mag 7 stocks guide.
TSMC is a direct way to participate in the AI semiconductor cycle at the foundational manufacturing layer, rather than at the chip-design or cloud layer. MEXC offers two routes to that exposure:
Live pricing for TSMC and other semiconductor names is available on the
MEXC stock markets page, subject to regional availability.
TSMC is best described as AI infrastructure rather than a pure AI stock, because it manufactures the chips that AI companies design. Its revenue depends on AI demand — 58% of 2025 revenue came from high-performance computing — but also on smartphones, PCs, cars, and industrial chips.
TSM is the American Depositary Receipt traded in New York, while 2330 is the ordinary share listed in Taiwan. Both represent the same company, though the ADR trades in US dollars during US market hours.
TSMC does not disclose customer revenue publicly, but its largest customers are widely understood to include Apple, Nvidia, AMD, Broadcom, Qualcomm, and MediaTek. Concentration among a few large designers is one of the stock's known risks.
TSMC manufactures for most major chip designers, so its monthly sales act as an early, aggregated reading of semiconductor demand. Strong or weak numbers shift expectations for the whole AI supply chain before individual customers report.
CoWoS is TSMC's advanced packaging technology, which attaches high-bandwidth memory next to an AI processor on the same package. It became a shipment bottleneck during the AI buildout, which is why packaging capacity is tracked as closely as wafer capacity.
Gross margin reached 66.2% in early 2026 on a combination of full factory utilization, an AI-heavy product mix, and pricing power at leading-edge nodes where customers have no real alternative. Foundry costs are largely fixed, so full fabs make each additional wafer highly profitable.
N2 is TSMC's 2-nanometer-class process node and A16 is the generation that follows, both built on new transistor structures suited to AI computing. Whether they ramp on schedule with healthy yields determines whether TSMC keeps its technology lead through the next cycle.
Not formally, but it holds a dominant position at the leading edge, where Samsung and Intel are the only other contenders and neither matches TSMC's scale and yield. At mature nodes competition is far broader, which is part of why product mix moves margins so much.
Most of TSMC's leading-edge capacity sits in Taiwan, so investors price in regional and export-control risk regardless of the fundamentals. Fabs in Arizona, Japan and Germany reduce that concentration, but slowly and at a higher cost per wafer.